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February 2008 rev 1.2 Peak Reducing EMI Solution
Features
* * * * * * * * * *
ASM3P2180A
clock and data dependent signals. ASM3P2180A allows significant system cost savings by reducing the number of circuit board layers, and shielding that are traditionally required to pass EMI regulations. ASM3P2180A modulates the output of a single PLL in order to "spread" the bandwidth of a synthesized clock, thereby decreasing the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most clock generators. Lowering EMI by increasing a signal's bandwidth is called spread spectrum clock generation. ASM3P2180A uses the most efficient and optimized modulation profile approved by the FCC and is implemented by using a proprietary all-digital method.
Generates a 1x EMI optimized clock output. Input frequency: 6MHz - 10MHz 18MHz - 30MHz Output frequency: 6MHz - 10MHz 18MHz - 30MHz Two selectable down spread options. Selectable frequency range. Integrated loop filter components. Operates with a 3.3V supply. Low-power CMOS design. Commercial temperature range 8-pin SOIC and 8-pin TSSOP packages.
Product Description
The ASM3P2180A is a versatile spread spectrum frequency modulator designed specifically for a wide range of clock frequencies. ASM3P2180A reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of down stream
Applications
The ASM3P2180A is targeted towards notebook LCD displays, other displays using an LVDS interface, PC peripheral devices and embedded systems.
Block Diagram
VDD
SS%
FS
CLKIN / XIN XOUT Crystal Oscillator
Modulation
CLKOUT
PLL
GND
PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200, Campbell, CA 95008 * Tel: 408-879-9077 * Fax: 408-879-9018 www.pulsecoresemi.com
Notice: The information in this document is subject to change without notice.
February 2008 rev 1.2
Pin Diagram
CLKIN / XIN 1 XOUT 2 3P2180A GND 3 SS% 4
8
ASM3P2180A
NC
7 FS 6 VDD 5 CLKOUT
Pin Description
Pin# 1 2 3 4 5 6 7 8 Pin Name CLKIN / XIN XOUT GND SS% CLKOUT VDD FS NC Type I O P I O P I Description Crystal connection or external reference clock input. Connection for an external crystal. If using an external reference, this pin must be left unconnected. Ground to entire chip. Spread Selection Input. Has an internal pull-up resistor. Modulated Clock Output. Power supply for the entire chip. Frequency selection bit. This pin selects the frequency range of operation. (Refer to the Frequency Range Selection Table). Has an internal pull-up resistor. No connect.
Frequency Range Selection
FS 0 1 Frequency Range (MHz) 6 -10 18-30
Spread Selection table
SS% 0 Frequency (MHz) FS=0 FS=1 6 18 8 24 10 30 6 18 8 24 10 30 Deviation (%) (typ) -2 -1.5 -1 -4 -3 -2
1
Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
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February 2008 rev 1.2
Absolute Maximum Ratings Symbol
VDD, VIN TSTG Ts TJ TDV Storage temperature Max. Soldering Temperature (10 sec) Junction Temperature Static Discharge Voltage (As per JEDEC STD22- A114-B)
ASM3P2180A
Parameter
Voltage on any pin with respect to Ground
Rating
-0.5 to +4.6 -65 to +125 260 150 2
Unit
V C C C KV
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability.
DC Electrical Characteristics Symbol
VIL VIH IIL IIH IXOL IXOH VOL VOH ICC IDD * VDD tON ZOUT Input low voltage Input high voltage Input low current (pull-up resistors on inputs SS%, FS) Input high current XOUT output low current (@ 0.4V, VDD = 3.3V) XOUT output high current (@2.5V, VDD = 3.3V) Output low voltage (VDD = 3.3V, IOL = 4mA) Output high voltage (VDD = 3.3V, IOH = 4mA) Dynamic supply current normal mode (3.3V and 10pF loading) Static supply current standby mode Operating voltage Power up time (first locked clock cycle after power up) Clock output impedance 2.5 10 15 25 7 2.8 3.3 0.18 50 3.7 3 4 0.4
Parameter
Min
GND - 0.3 2.0
Typ
Max
0.8 VDD + 0.3 -27 18
Unit
V V A A mA mA V V mA mA V mS
*CLKIN pin pulled to GND
Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
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February 2008 rev 1.2
AC Electrical Characteristics Symbol
CLKIN CLKOUT tLH* tHL* tJC tD Input frequency Output frequency
ASM3P2180A
Parameter
FS=0 FS=1 FS=0 FS=1
Min
6 18 6 18 1.2 0.8 45
Typ
Max
10 30 10 30
Unit
MHz MHz nS nS pS %
Output rise time (measured at 0.8V to 2.0V) Output fall time (measured at 2.0V to 0.8V) Jitter (cycle to cycle) Output duty cycle
1.3 0.9 325 50
1.4 1.0 55
*tLH and tHL are measured into a capacitive load of 15pF
Typical Test Circuit
+3.3V Crystal XIN C1 XOUT C2 CLKOUT GND CLOAD Spread spectrum output (EMI suppressed) VDD 0.1uF
Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
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February 2008 rev 1.2
Package Information 8-Pin SOIC Package
ASM3P2180A
E
H
D
A2
A
e B A 1
C L
D
Dimensions
Symbol Min
A1 A A2 B C D E e H L
Inches Max
0.010 0.069 0.059 0.020 0.010 0.004 0.053 0.049 0.012 0.007
Millimeters Min Max
0.10 1.35 1.25 0.31 0.18 4.90 BSC 3.91 BSC 1.27 BSC 6.00 BSC 0.41 0 1.27 8 0.25 1.75 1.50 0.51 0.25
0.193 BSC 0.154 BSC 0.050 BSC 0.236 BSC 0.016 0 0.050 8
Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
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February 2008 rev 1.2
8-Pin TSSOP Package
ASM3P2180A
H
E D A2 A e B A1 L C
Dimensions Symbol Min
A A1 A2 B c D E e H L 0.020 0 0.002 0.033 0.008 0.004 0.114 0.169 0.026 BSC 0.252 BSC 0.028 8 0.50 0
Inches Max
0.043 0.006 0.037 0.012 0.008 0.122 0.177 0.05 0.85 0.19 0.09 2.90 4.30
Millimeters Min Max
1.10 0.15 0.95 0.30 0.20 3.10 4.50 0.65 BSC 6.40 BSC 0.70 8
Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
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February 2008 rev 1.2
Ordering Codes Part number
ASM3P2180AF-08ST ASM3P2180AF-08SR ASM3P2180AF-08TT ASM3P2180AF-08TR ASM3P2180AG-08ST ASM3P2180AG-08SR ASM3P2180AG-08TT ASM3P2180AG-08TR
ASM3P2180A
Marking
ASM3P2180AF ASM3P2180AF ASM3P2180AF ASM3P2180AF ASM3P2180AG ASM3P2180AG ASM3P2180AG ASM3P2180AG
Package Type
8-pin SOIC, tube, Pb Free 8-pin SOIC, tape and reel, Pb Free 8-pin TSSOP, tube, Pb Free 8-pin TSSOP, tape and reel, Pb Free 8-pin SOIC, tube, Green 8-pin SOIC, tape and reel, Green 8-pin TSSOP, tube, Green 8-pin TSSOP, tape and reel, Green
Temperature
Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial
Device Ordering Information
ASM 3P
2180A F- 08 S R
R = Tape & Reel, T = Tube or Tray O = SOT S = SOIC T = TSSOP A = SSOP V = TVSOP B = BGA Q = QFN DEVICE PIN COUNT F = LEAD FREE AND RoHS COMPLIANT PART G = GREEN PACKAGE, LEAD FREE, and RoHS PART NUMBER X= Automotive I= Industrial P or n/c = Commercial (-40C to +125C) (-40C to +85C) (0C to +70C) 1 = Reserved 2 = Non PLL based 3 = EMI Reduction 4 = DDR support products 5 = STD Zero Delay Buffer 6 = Power Management 7 = Power Management 8 = Power Management 9 = Hi Performance 0 = Reserved U = MSOP E = TQFP L = LQFP U = MSOP P = PDIP D = QSOP X = SC-70
PulseCore Semiconductor Mixed Signal Product
Licensed under US patent #5,488,627, #6,646,463 and #5,631,920.
Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
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February 2008 rev 1.2
ASM3P2180A
PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018 www.pulsecoresemi.com
Copyright (c) PulseCore Semiconductor All Rights Reserved Part Number: ASM3P2180A Document Version: 1.2
Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003 Many PulseCore Semiconductor products are protected by issued patents or by applications for patent
(c) Copyright 2006 PulseCore Semiconductor Corporation. All rights reserved. Our logo and name are trademarks or registered trademarks of PulseCore Semiconductor. All other brand and product names may be the trademarks of their respective companies. PulseCore reserves the right to make changes to this document and its products at any time without notice. PulseCore assumes no responsibility for any errors that may appear in this document. The data contained herein represents PulseCore's best data and/or estimates at the time of issuance. PulseCore reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. PulseCore does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of PulseCore products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in PulseCore's Terms and Conditions of Sale (which are available from PulseCore). All sales of PulseCore products are made exclusively according to PulseCore's Terms and Conditions of Sale. The purchase of products from PulseCore does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of PulseCore or third parties. PulseCore does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of PulseCore products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify PulseCore against all claims arising from such use.
Peak Reducing EMI Solution
Notice: The information in this document is subject to change without notice.
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